The I2C bus is a 2-wire serial bus developed by Philips. Because of its simplicity, high efficiency, and low interconnection cost, it is widely used for the connection between microcontrollers and peripheral devices. AT91SAM7X256 is an industrial-grade chip based on ARM7 launched by Atmel in 2005. He has been valued by developers in the embedded field for its small size, low power consumption, extensive connection methods, rich processing resources, and flexible control. This article introduces the use method of AT91SAM7X256's I2C controller TWI interface (two-wired interface), and takes I2C device E2PROM and calendar clock chip as an example to achieve AT91SAM7X256 to read and store time data. At the same time, in order to verify whether the reading and storage of time data are correct, use the online simulator J-LINK of AT91SAM7X256 to read the data in E2PROM to the memory for checking.
hardware design
2.1 Hardware module structure
The hardware module structure of the circuit is shown in Figure 1.
The TWI interface of AT91SAM7X256 is composed of a clock line TWCK and a data line TWD, and the generated signal timing conforms to the I2C bus specification; PCF8563 is an industrial-grade clock chip with I2C bus interface function launched by Philips; AT24C08 is Atmel The company's two-wire serial E2PROM conforming to the I2C protocol. The TWCK and TWD of the AT91SAM7X256 are connected to the SCL and SDA of the PCF8563 and AT24C08 chips respectively. The CPU reads and stores the time data through the TWI interface. In order to ensure that the CPU does not conflict to access PCF8563 and AT24C08, this article will connect the A2 pin of AT24C08 to high level. Since the I2C bus is at a high level when it is idle, in order to realize the "wire AND" function, the devices connected to the bus are all open collectors, so the bus needs an external pull-up resistor R. The TWI of AT91SAM7X256 has two working modes: master and slave. In this article, AT91SAM7X256 as the controller should work in master mode.
2.2 TWI interface of AT91SAM7X256
The TWD and TWCK pins of the AT91SAM7X256 are multiplexed with the I / O pins of the device. At the same time, the AT91SAM7X256 uses a power-saving scheme that controls the functional units separately. The power management unit PMC controls whether the clocks of the functional units work, so the TWI interface is required. First configure TWD and TWCK as the peripheral connection and open circuit state, and then configure PMC to make the TWI clock in working state.
The TWI interface can provide a transmission rate of up to 400 kb / s. In order to make the data transmission rate face different applications, the signal frequency of TWCK can be adjusted by configuring the control register TWI_CWEG of the clock generator.
The signal timing generated by the TWI interface conforms to the I2C bus specification. When reading / writing 1 byte of data, the master device needs to provide the device address, internal address, read-write control, and start and stop flags of the slave device. In the process of sending and receiving data, the main use is the control register TWI_CR, the main mode register TWI_MMR, the internal address register TWI_IADR, the status register TWI_SR, the transmission holding register TWI_THR, and the receiving holding register TWI_RHR. The slave device address is set in TWI_MMR, and the slave device's internal address is set in TWI_IADR; whether to send the start signal and stop signal is set in TWI_CR; NAK (no response), OVER (operation error), TXRDY (transmission ready), Status bits such as RXRDY (ready to receive), TX-COMP (transmission complete), etc. are obtained by querying WI_SR.
The process of writing data includes: when TWI_THR writes data, the CPU generates a start signal to start transmission, and the data in TWI_THR is transmitted by TWD after parallel-to-serial conversion. When the CPU receives the response signal from the device, TXWI of TWI_SR will Automatically set to "1", indicating that the data has been written to the slave device. The process of reading data includes: After the CPU sends the start signal, if the RXRDY bit of TWI_SR is "1", it means that there is data waiting to be received in TWI_RHR. When the data in TWI_RHR is read, RXRDY is automatically set to "0" . When reading / writing data is completed, the CPU will generate a stop signal to end the transmission, and TXCOMP of TWI_SR will be automatically set to "1".
2.3 How to use the PCF8563 calendar clock chip
According to the I2C protocol, PCF8563 has a unique device address 0A2H. This article focuses on the reading method of PCF8563 hour, minute and second data. The internal registers used here include control / status register 1 (address 00H), second register (address 02H), minute register (address 03H), Hour register (address 04H). Because the time, minute, and second data are stored in the BCD format in the register, the high bit of the time register is invalid at each time.
In order to make PCF8563 work in the normal mode, the control / status register 1 needs to be set to 00H, and in order to store the correct time data, the invalid high bits in the read data need to be masked. If you need to calibrate the time, just write to the hour, minute, and second registers.
2.4 How to use AT24C08
AT24C08 is an E2PROM with a capacity of 8192 b (1024 B). The AT24C08 is divided into 4 pages, each page has a 256-byte unit, so if you want to access a unit requires 10 bits for addressing, the highest two bits are the page address, the lower 8 bits are the page address. The definition of the device address is shown in Figure 2, where P1P0 corresponds to the page address, and pin A2 can set two sets of device addresses for AT24C08. When A2 is low, the device addresses of 4 pages are 0A0H, 0A2H, 0A4H, 0A6H; when A2 is high; otherwise, 0A8H, 0AAH, 0ACH, 0AEH. Therefore, in order to avoid the device address conflict between AT24C08 and PCF8563, A2 needs to be connected to high level.
AT24C08's write operation supports "byte write" and "page write" two ways. Each byte written in the "byte write" mode requires the master device to provide a start signal, device address, internal address, and stop signal; the "page write" mode is to continuously write data, and the master device needs to provide the start flag and device address As well as the internal address, the stop sign is sent after all data is written.
AT24C08's read operation supports three methods: "current address read", "random read" and "sequential read". "Current address read" means read 1 byte from the current internal address unit, so the master only needs to provide the start signal, device address and stop signal; "random read" means read 1 byte from any internal address unit , So the main device needs to provide a start signal, device address, write operation, device internal address and stop signal, set the device internal address, and then read the data in the "current address read" mode; "sequential read "Indicates that multiple bytes are continuously read from the current address, so the master device needs to provide a start signal, device address, and read operation, and then send a stop signal after all the data has been read.
In order to read and write data quickly, this article uses page writing to write data to AT24C08; it uses a combination of "random read" and "sequential read" to read AT24C08 data.
software design
3.1 Design of TWI initialization program
According to the functional characteristics of TWI, the initialization of TWI initialization includes the following 4 steps:
(1) Configure the PIO controller to make the multiplexed pin drive the TWI signal;
(2) Configure PMC to make the TWI clock in working state;
(3) Configure TWI as the main working mode. In this paper, the CPU is the master device, and the calendar and storage chip are slave devices;
(4) Set the data transmission rate and configure the TWI clock waveform generator register.
3.2 Design of PCF8563 driver
In order to control the working mode of PCF8563, it is necessary to write control words to it; in order to get the time information output by PCF8563, it needs to be read. The flow of reading / writing data is shown in Figure 3.
This article is designed to write the following read function and write function:
Among them, pTwi is a structure pointer, and the TWI register in the structure pointed to can be accessed through pTwi; address represents the device address; im_address represents the internal address of the device; data represents the variable pointer for reading and writing data.
Therefore, if you want to make PCF8563 work in normal mode and read the "hour" data, you can use the following code:
3.3 Design of AT24C08 driver
Because AT24C08 consists of 4 pages with different device addresses, and adopts the continuous reading and writing data operation mode, the reading and writing of AT24C08 and PCF8563 have the following differences.
(1) Set the start flag of TWI_CR first, then read / write the data of TWI interface through TWI_RHR and TWI_THR; before sending the last data, then set the stop flag of TWI_CR.
(2) For the reading and writing of multi-byte data, if all the data has not been transmitted, the stop signal will not be sent, so you need to determine whether to read TWI_RHR and write TWI_THR by judging TXRDY and RXRDY in the TWI_SR register, and whether there will be a stop signal As a basis for judging whether to stop sending and receiving.
(3) Because the amount of data and the starting unit are random, it is possible that one page cannot be written, so for a given amount of data and starting unit parameters, a total of several pages are required to calculate Change the device address when switching.
This article designs and writes the following read function and write function.
Among them, nb is the number of bytes read / written, and data represents the first pointer of the array variable for storing read-write data.
3.4 Software debugging and operation
This article uses the IAR development environment and J-LINK emulator for online debugging and loading and running of the software. Call the function to complete the following program design: First, read some data from PCF8563 and write it to AT24C08 continuously; Secondly, read the data in AT24C08 to the array variable. After reading the AT24C08 data in the program, set a breakpoint and observe the data stored in the array to verify the correctness of the driver.
This article introduces the usage of PCF8563 and AT24C08. By analyzing the TWI interface control method of AT91SAM7X256 based on ARM core, the driver of PCF8563 and AT24C08 is designed to realize the reading and storage of clock data.
The drive module designed in this paper has been successfully used in the intelligent coal mine substation experiment system, and has completed the recording function of historical time data. At the same time, this paper provides a method for ARM to control multiple I2C devices.
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