First, PT4115 application features
1. The larger the inductance and the lower the operating frequency, the better the constant current effect.
2. The larger the output current, the smaller the inductor value is needed, and the inductor selection is convenient.
3. The higher the output voltage, the higher the efficiency. The 5 1W series is more efficient than the 1 5W.
4. Generally, the larger the inductance, the smaller the switching loss of the power switch, but the DCR will become larger, and the corresponding inductance loss will become larger.
5. The feedback voltage is 1 00mY, the loss is the smallest in the industry, and the power switch is energized and damped.
6. For 0.6Q, it is also relatively small, and the efficiency is higher than the average product.
7. The internal temperature protection function is provided, and the external temperature protection can be designed to protect the LED .
8. In SOT89 -5 package, the thermal resistance is only 45 °C / w, and the heat dissipation characteristics are very good.
Second, PT4115 application circuit
Figure 1 PT4115 application circuit
Third, the circuit working principle analysis
It is AC and DC in the voltage range of 12~24V. VD1～VD4 form a rectifier bridge. This bridge has two functions. If the input is AC power, the AC is rectified into DC; if the input is DC power, the polarity is changed. effect. Regardless of the polarity of the input power supply, the circuit is guaranteed to work properly. CIN is a filter capacitor that converts pulsating DC into a smooth DC. R is the sampling resistor that determines the absolute accuracy of the constant current source. L converts the 100 kHz pulse current into a triangular wave current whose inductance affects the stability of the constant current source over the operating voltage range. VD5 is a freewheeling diode that provides a discharge loop for the current stored in the inductor when the MOS transistor inside the chip is in the off state. Due to the high-frequency pulse state VD5, a Schottky diode with a small forward voltage drop and a fast recovery speed should be used. The DIM end of the chip can be externally connected to PWM pulse or DC voltage dimming, or can be connected to the thermistor for auxiliary temperature control and automatic brightness control. If you do not use these features, the DIM port is left floating.
HDI PCB Specification
High density interconnect (HDI) PCBs represent one of the fastest-growing segments of the printed circuit board market. Because of its higher circuitry density, the HDI PCB design is able to incorporate finer lines and spaces, smaller vias and capture pads, and higher connection pad densities. A high density PCB features blind and buried vias and often contains microvias that are .006 in diameter or even less.
HDI PCBs are characterized by high-density attributes including laser microvias, fine lines and high performance thin materials. This increased density enables more functions per unit area. Higher technology HDI PCBs have multiple layers of copper filled stacked microvias (Advanced HDI PCBs) which creates a structure that enables even more complex interconnections. These very complex structures provide the necessary routing solutions for today's large pin-count chips utilized in mobile devices and other high technology products.
The HDI PCBs we offer include the following highly requested characteristics:
Blind and/or buried vias
Via-in-pad
Through vias from surface to surface
20 µm circuit geometries
30 µm dielectric layers
50 µm laser vias
125 µm bump pitch processing
Applications
HDI PCB is used to reduce size and weight, as well as to enhance electrical performance of the device. HDI PCB is the best alternative to high layer-count and expensive standard laminate or sequentially laminated boards. HDI incorporate blind and buried vias that help to save PCB real estate by allowing features and lines to be designed above or below them without making a connection. Many of today's fine pitch BGA and flip-chip component footprints do not allow for running traces between the BGA pads. Blind and buried vias will only connect layers requiring connections in that area.
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