The core of the electronic enthusiast network: Programmable Logic Device (PLD) is an important branch of the ASIC, the user can achieve the required functions by programming the device. The electronic enthusiast network will edit the simple logic device PAL/GAL and other PLD chip cracking methods for everyone.
PLA, PAL and GAL are simple PLDs with simple structure, flexible design and low requirements for development software.
The Programmable Logic Array (PLA) appeared in the mid-1970s and consists of programmable arrays and programmable or arrays.
The Programmable Array Logic (PAL) device was first introduced by MMI Corporation in the United States in 1977. It is widely used due to its variety of output structures and flexible design.
Generic Array Logic (GAL) devices are the first inventors of LATTICE in 1985 to electrically erasable, programmable, and configurable encryption bits.
Representative GAL chips are GAL16V8 and GAL20, which are capable of simulating almost all types of PAL devices.
In practical applications, GAL devices are 100% compatible with PAL device emulation, so GAL can almost completely replace PAL devices, and can replace most SSI, MSI digital integrated circuits, and thus is widely used.
The biggest difference between GAL and PAL is that the output structure of GAL is user-definable and is a programmable output structure. GAL's two basic models, the GAL16V8 (20-pin) GAL20V8 (24-pin), replace the ten PAL devices in the tree and are therefore called painful programmable circuits. The output of PAL is defined by the manufacturer. After the chip is selected, it is fixed and cannot be changed by the user.
Analysis of GAL cracking method: After understanding the structure and composition of PAL and GAL, it is not difficult to analyze how to crack the GAL logic circuit. Whether it is PAL or GAL, at the beginning of the article it is a simple PLD (programmable logic device), then this device is to achieve a certain logic function. If we know the logical relationship between the pins, then it is equivalent to having a program.
How to get the logical relationship of the already encrypted GAL device. Using a logic analyzer to perform a logic analysis on the output pins of the GAL to obtain the logical relationship of each output pin, then the logical relationship of the entire GAL logic circuit is obtained. This logic relationship can be a logic diagram. It can be a kind of logic code file, save the obtained logical file, and then convert this file into GAL-specific file format JED file, so that the GAL code is obtained, and the effect of decrypting GAL is realized.
Since the logic analysis method does not destroy the chip, the GAL and PAL chips can work normally, and it is a safe decryption method compared with intrusive cracking.
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