Electronic enthusiast network core tips : PLA, short for ProgrammableLogicArray, meaning programmable logic array. This article will focus on some of the basic concepts, types, and basic applications of programmable logic array PLA.
I. The basic concept of PLA
Programmable Logic Array is a programmableLogicArray (PLA) in English. It is a programmable logic device. It is programmable with AND array and OR array. The output circuit is not configurable. Also known as FPLA (field-programmable logic array). Programmable Logic Array PLA is a programmable device that can be used to implement combinatorial logic. The PLA has a set of programmable AND steps, and the AND stage is followed by a set of programmable OR steps. This can be achieved: "The logic signal output is allowed only when the conditions are met."
Programmable Logic Array (Programmable Logic Controller) PLA such a logic gate layout can be used to plan a large number of logic functions, which must first be homogeneous in the original form of the product term (sometimes multiple product terms). Turn.
From the perspective of implementing logic functions, for most logic functions, it is not necessary to use all the minimum terms, especially for logic functions containing constraints, many minimum terms are not possible. The PROM's AND array permanently generates all of the minimum entries for n input variables. Therefore, the "AND" array of the PROM cannot be fully utilized and the hardware waste is caused, so that the utilization of the chip area is not high. In order to overcome the shortcomings of PROM, a logic device that can be programmed with both an AND array and an OR array can be programmed to program a logic array PLA (Programmable Logic Control Device).
II . Types of PLA
PLA can be divided into two types: combined programmable logic array PLA and time programmable logic array PLA.
1. Combined programmable logic array PLA
Logical structure: consists of an AND array and an OR array, and the AND array and OR array are programmable.
In the programmable logic array PLA (Development of Programmable Logic Control Devices), the AND array of n input variables does not generate 2n AND terms, but P AND gates provide P AND terms. Which variables are associated with each AND term can be determined programmatically. The OR array can be programmed to select the desired AND term to form an AND-OR function.
The functional implementation implemented by PLA is the simplest "and-or" expression. The storage capacity of the PLA is not only related to the number of input variables and the number of output terminals, but also related to its number of AND terms (ie, the number of AND gates). The storage capacity uses the number of input variables (n) and the number of items ( p), the number of output terminals (m) to represent.
2. Timing programmable logic array PLA
Logical structure: Consists of an AND array, an OR array, and a network of triggers for storing previous states.
The trigger network contains a number of flip-flops whose inputs accept the OR output of the array and control of the clock pulses and reset signals. The output is fed back to the AND array to produce an AND output along with the existing inputs.
The programmable logic array design method means that the user can perform on-site programming and manufacturing by using the general-purpose device provided by the manufacturer, or by mask programming the AND matrix or the matrix to obtain the required ASIC.
The logic design using the programmable logic array PLA can realize various logic functions very effectively. Compared to PROM, PLA is more flexible, more economical, and simpler in structure. When designing a combinational logic circuit with PLA, it is generally first to simplify the simplification of the logic function of a given problem into a simplest "and-or" expression according to the simplification of the multi-output logic function, and then, according to the difference in the simplest expression, The sum of the term and the AND term of each functional form constitutes an AND array and an OR array, respectively, and an array logic diagram is drawn.
Application of programmable logic array PLA
In the application of programmable logic array PLA, one is used to control the data path, the logic state is defined in advance in the instruction set, and the next logic state is generated (through the conditional branch).
For example, if the current machine (referring to the entire logic system) is in the second state, if the next execution instruction contains an immediate value (a field that detects the immediate value), the machine changes from the second state to the fourth state. The status of the number, and can also further define the subsequent action after entering the fourth state. Therefore, PLA is equal to the role of the statediagram contained in the (wafer) system.
In addition to the programmable logic array PLA, other commonly used programmable logic devices include programmable array logic (PAL), complex programmable logic devices (CPLD), and field programmable logic gate arrays (FPGAs).
It should be noted that although the term "programmable" is used in the term "programmable logic array", it does not mean that all PLAs have on-site programmability. In fact, many are maskable and programmable, the same nature as ROM, and must be programmed and completed in the wafer manufacturer, especially for chips that are embedded in circuits (eg microprocessors) The PLA is mostly in this stylized way.
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